SignatureIP’s vision is to make every customer’s SoC optimized to exploit the full speed and efficiency of the most modern interconnect available, from NoCs to interfaces to die-to-die interconnect.
SignatureIP’s mission is to enable our customers to rapidly and efficiently explore the design space for their SoCs and achieve the best possible architecture. We aim to speed our customers to market via top-down design exploration and optimization, configurability and flexibility, and excellent customer support.
Today’s SoCs are growing in size and complexity, driving a transition from on-chip bus technology to NoC solutions, the adoption of chiplets and more. NoCs provide the speed and flexibility to route data around an SoC the same way data is routed around the internet, using packet switching and layered communication protocols. A NoC can support more concurrent communication channels than a bus architecture, which can increase system performance. A NoC can also provide more efficient communication between different components of a system, as it can route data packets to specific destination nodes, rather than broadcasting the data to all nodes on the bus, as in bus architectures. This can also help to reduce power consumption, as communication can be more targeted and not broadcast to all nodes. A NoC is also scalable, as it can handle more complex systems as the number of nodes increases.
iNoCulatorTM is a unique end-to-end solution for the creation and exploration of NoCs, from ideation to system architecture to RTL simulation, emulation and implementation. It allows flexible NoC topology, with easy editing tools, full configuration, and is fully integrated with customers’ EDA environments.
Learn MoreNC-NoC is available today as a layered, scalable, physically aware configurable NoC supporting multiple clocking schemes for NoCs that do not require coherency. It supports multiple protocols such as AXI4/3, AHB, APB, AXI-lite and multiple bus widths from 32 to 2048 bits.
Learn MoreC-NoC, available in the second half of 2023, is a coherent NoC technology that supports mesh, grid and torus topologies with on-chip L3 cache support to reduce latency. This also supports multiple protocols including CHI, AXI4/3, AXI-lite, ACE and ACE-lite with bus widths from 32 to 2048 bits.
Learn MoreSignatureIP’s NoC solution was designed from the beginning to be flexible and easily configurable, with instant simulation options to explore the design space, and pushbutton generation of the top-level RTL code. Customers can easily and quickly experiment with different NoC topologies and settings and see the resulting latency, performance and power results.
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